
get-ip4:     file format elf64-littleaarch64


Disassembly of section .init:

00000000004005b0 <_init>:
  4005b0:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4005b4:	910003fd 	mov	x29, sp
  4005b8:	94000044 	bl	4006c8 <call_weak_fn>
  4005bc:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4005c0:	d65f03c0 	ret

Disassembly of section .plt:

00000000004005d0 <.plt>:
  4005d0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4005d4:	90000090 	adrp	x16, 410000 <__FRAME_END__+0xf534>
  4005d8:	f947fe11 	ldr	x17, [x16, #4088]
  4005dc:	913fe210 	add	x16, x16, #0xff8
  4005e0:	d61f0220 	br	x17
  4005e4:	d503201f 	nop
  4005e8:	d503201f 	nop
  4005ec:	d503201f 	nop

00000000004005f0 <snprintf@plt>:
  4005f0:	b0000090 	adrp	x16, 411000 <snprintf@GLIBC_2.17>
  4005f4:	f9400211 	ldr	x17, [x16]
  4005f8:	91000210 	add	x16, x16, #0x0
  4005fc:	d61f0220 	br	x17

0000000000400600 <__libc_start_main@plt>:
  400600:	b0000090 	adrp	x16, 411000 <snprintf@GLIBC_2.17>
  400604:	f9400611 	ldr	x17, [x16, #8]
  400608:	91002210 	add	x16, x16, #0x8
  40060c:	d61f0220 	br	x17

0000000000400610 <__gmon_start__@plt>:
  400610:	b0000090 	adrp	x16, 411000 <snprintf@GLIBC_2.17>
  400614:	f9400a11 	ldr	x17, [x16, #16]
  400618:	91004210 	add	x16, x16, #0x10
  40061c:	d61f0220 	br	x17

0000000000400620 <abort@plt>:
  400620:	b0000090 	adrp	x16, 411000 <snprintf@GLIBC_2.17>
  400624:	f9400e11 	ldr	x17, [x16, #24]
  400628:	91006210 	add	x16, x16, #0x18
  40062c:	d61f0220 	br	x17

0000000000400630 <puts@plt>:
  400630:	b0000090 	adrp	x16, 411000 <snprintf@GLIBC_2.17>
  400634:	f9401211 	ldr	x17, [x16, #32]
  400638:	91008210 	add	x16, x16, #0x20
  40063c:	d61f0220 	br	x17

0000000000400640 <socket@plt>:
  400640:	b0000090 	adrp	x16, 411000 <snprintf@GLIBC_2.17>
  400644:	f9401611 	ldr	x17, [x16, #40]
  400648:	9100a210 	add	x16, x16, #0x28
  40064c:	d61f0220 	br	x17

0000000000400650 <strcpy@plt>:
  400650:	b0000090 	adrp	x16, 411000 <snprintf@GLIBC_2.17>
  400654:	f9401a11 	ldr	x17, [x16, #48]
  400658:	9100c210 	add	x16, x16, #0x30
  40065c:	d61f0220 	br	x17

0000000000400660 <printf@plt>:
  400660:	b0000090 	adrp	x16, 411000 <snprintf@GLIBC_2.17>
  400664:	f9401e11 	ldr	x17, [x16, #56]
  400668:	9100e210 	add	x16, x16, #0x38
  40066c:	d61f0220 	br	x17

0000000000400670 <ioctl@plt>:
  400670:	b0000090 	adrp	x16, 411000 <snprintf@GLIBC_2.17>
  400674:	f9402211 	ldr	x17, [x16, #64]
  400678:	91010210 	add	x16, x16, #0x40
  40067c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400680 <_start>:
  400680:	d280001d 	mov	x29, #0x0                   	// #0
  400684:	d280001e 	mov	x30, #0x0                   	// #0
  400688:	aa0003e5 	mov	x5, x0
  40068c:	f94003e1 	ldr	x1, [sp]
  400690:	910023e2 	add	x2, sp, #0x8
  400694:	910003e6 	mov	x6, sp
  400698:	580000c0 	ldr	x0, 4006b0 <_start+0x30>
  40069c:	580000e3 	ldr	x3, 4006b8 <_start+0x38>
  4006a0:	58000104 	ldr	x4, 4006c0 <_start+0x40>
  4006a4:	97ffffd7 	bl	400600 <__libc_start_main@plt>
  4006a8:	97ffffde 	bl	400620 <abort@plt>
  4006ac:	00000000 	.inst	0x00000000 ; undefined
  4006b0:	0040077c 	.word	0x0040077c
  4006b4:	00000000 	.word	0x00000000
  4006b8:	00400998 	.word	0x00400998
  4006bc:	00000000 	.word	0x00000000
  4006c0:	00400a18 	.word	0x00400a18
  4006c4:	00000000 	.word	0x00000000

00000000004006c8 <call_weak_fn>:
  4006c8:	90000080 	adrp	x0, 410000 <__FRAME_END__+0xf534>
  4006cc:	f947f000 	ldr	x0, [x0, #4064]
  4006d0:	b4000040 	cbz	x0, 4006d8 <call_weak_fn+0x10>
  4006d4:	17ffffcf 	b	400610 <__gmon_start__@plt>
  4006d8:	d65f03c0 	ret
  4006dc:	00000000 	.inst	0x00000000 ; undefined

00000000004006e0 <deregister_tm_clones>:
  4006e0:	b0000080 	adrp	x0, 411000 <snprintf@GLIBC_2.17>
  4006e4:	91016000 	add	x0, x0, #0x58
  4006e8:	b0000081 	adrp	x1, 411000 <snprintf@GLIBC_2.17>
  4006ec:	91016021 	add	x1, x1, #0x58
  4006f0:	eb00003f 	cmp	x1, x0
  4006f4:	540000a0 	b.eq	400708 <deregister_tm_clones+0x28>  // b.none
  4006f8:	90000001 	adrp	x1, 400000 <_init-0x5b0>
  4006fc:	f9451c21 	ldr	x1, [x1, #2616]
  400700:	b4000041 	cbz	x1, 400708 <deregister_tm_clones+0x28>
  400704:	d61f0020 	br	x1
  400708:	d65f03c0 	ret
  40070c:	d503201f 	nop

0000000000400710 <register_tm_clones>:
  400710:	b0000080 	adrp	x0, 411000 <snprintf@GLIBC_2.17>
  400714:	91016000 	add	x0, x0, #0x58
  400718:	b0000081 	adrp	x1, 411000 <snprintf@GLIBC_2.17>
  40071c:	91016021 	add	x1, x1, #0x58
  400720:	cb000021 	sub	x1, x1, x0
  400724:	9343fc21 	asr	x1, x1, #3
  400728:	8b41fc21 	add	x1, x1, x1, lsr #63
  40072c:	9341fc21 	asr	x1, x1, #1
  400730:	b40000a1 	cbz	x1, 400744 <register_tm_clones+0x34>
  400734:	90000002 	adrp	x2, 400000 <_init-0x5b0>
  400738:	f9452042 	ldr	x2, [x2, #2624]
  40073c:	b4000042 	cbz	x2, 400744 <register_tm_clones+0x34>
  400740:	d61f0040 	br	x2
  400744:	d65f03c0 	ret

0000000000400748 <__do_global_dtors_aux>:
  400748:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40074c:	910003fd 	mov	x29, sp
  400750:	f9000bf3 	str	x19, [sp, #16]
  400754:	b0000093 	adrp	x19, 411000 <snprintf@GLIBC_2.17>
  400758:	39416260 	ldrb	w0, [x19, #88]
  40075c:	35000080 	cbnz	w0, 40076c <__do_global_dtors_aux+0x24>
  400760:	97ffffe0 	bl	4006e0 <deregister_tm_clones>
  400764:	52800020 	mov	w0, #0x1                   	// #1
  400768:	39016260 	strb	w0, [x19, #88]
  40076c:	f9400bf3 	ldr	x19, [sp, #16]
  400770:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400774:	d65f03c0 	ret

0000000000400778 <frame_dummy>:
  400778:	17ffffe6 	b	400710 <register_tm_clones>

000000000040077c <main>:
  40077c:	d12303ff 	sub	sp, sp, #0x8c0
  400780:	a9017bfd 	stp	x29, x30, [sp, #16]
  400784:	910043fd 	add	x29, sp, #0x10
  400788:	b908a3bf 	str	wzr, [x29, #2208]
  40078c:	52800002 	mov	w2, #0x0                   	// #0
  400790:	52800041 	mov	w1, #0x2                   	// #2
  400794:	52800040 	mov	w0, #0x2                   	// #2
  400798:	97ffffaa 	bl	400640 <socket@plt>
  40079c:	b9089fa0 	str	w0, [x29, #2204]
  4007a0:	b9489fa0 	ldr	w0, [x29, #2204]
  4007a4:	3100041f 	cmn	w0, #0x1
  4007a8:	540000c1 	b.ne	4007c0 <main+0x44>  // b.any
  4007ac:	90000000 	adrp	x0, 400000 <_init-0x5b0>
  4007b0:	91292000 	add	x0, x0, #0xa48
  4007b4:	97ffff9f 	bl	400630 <puts@plt>
  4007b8:	12800000 	mov	w0, #0xffffffff            	// #-1
  4007bc:	14000073 	b	400988 <main+0x20c>
  4007c0:	52810000 	mov	w0, #0x800                 	// #2048
  4007c4:	b90853a0 	str	w0, [x29, #2128]
  4007c8:	910143a0 	add	x0, x29, #0x50
  4007cc:	f9042fa0 	str	x0, [x29, #2136]
  4007d0:	912143a0 	add	x0, x29, #0x850
  4007d4:	aa0003e2 	mov	x2, x0
  4007d8:	d2912241 	mov	x1, #0x8912                	// #35090
  4007dc:	b9489fa0 	ldr	w0, [x29, #2204]
  4007e0:	97ffffa4 	bl	400670 <ioctl@plt>
  4007e4:	3100041f 	cmn	w0, #0x1
  4007e8:	540000c1 	b.ne	400800 <main+0x84>  // b.any
  4007ec:	90000000 	adrp	x0, 400000 <_init-0x5b0>
  4007f0:	91296000 	add	x0, x0, #0xa58
  4007f4:	97ffff8f 	bl	400630 <puts@plt>
  4007f8:	12800000 	mov	w0, #0xffffffff            	// #-1
  4007fc:	14000063 	b	400988 <main+0x20c>
  400800:	f9442fa0 	ldr	x0, [x29, #2136]
  400804:	f90457a0 	str	x0, [x29, #2216]
  400808:	b94853a0 	ldr	w0, [x29, #2128]
  40080c:	93407c01 	sxtw	x1, w0
  400810:	b202e7e0 	mov	x0, #0xcccccccccccccccc    	// #-3689348814741910324
  400814:	f29999a0 	movk	x0, #0xcccd
  400818:	9bc07c20 	umulh	x0, x1, x0
  40081c:	d345fc01 	lsr	x1, x0, #5
  400820:	aa0103e0 	mov	x0, x1
  400824:	d37ef400 	lsl	x0, x0, #2
  400828:	8b010000 	add	x0, x0, x1
  40082c:	d37df000 	lsl	x0, x0, #3
  400830:	aa0003e1 	mov	x1, x0
  400834:	f94457a0 	ldr	x0, [x29, #2216]
  400838:	8b010000 	add	x0, x0, x1
  40083c:	f9044ba0 	str	x0, [x29, #2192]
  400840:	b908a7bf 	str	wzr, [x29, #2212]
  400844:	1400004c 	b	400974 <main+0x1f8>
  400848:	f94457a1 	ldr	x1, [x29, #2216]
  40084c:	912183a0 	add	x0, x29, #0x860
  400850:	97ffff80 	bl	400650 <strcpy@plt>
  400854:	912183a0 	add	x0, x29, #0x860
  400858:	aa0003e2 	mov	x2, x0
  40085c:	d2912261 	mov	x1, #0x8913                	// #35091
  400860:	b9489fa0 	ldr	w0, [x29, #2204]
  400864:	97ffff83 	bl	400670 <ioctl@plt>
  400868:	7100001f 	cmp	w0, #0x0
  40086c:	54000741 	b.ne	400954 <main+0x1d8>  // b.any
  400870:	79d0e3a0 	ldrsh	w0, [x29, #2160]
  400874:	12003c00 	and	w0, w0, #0xffff
  400878:	121d0000 	and	w0, w0, #0x8
  40087c:	7100001f 	cmp	w0, #0x0
  400880:	54000741 	b.ne	400968 <main+0x1ec>  // b.any
  400884:	912183a0 	add	x0, x29, #0x860
  400888:	aa0003e2 	mov	x2, x0
  40088c:	d29124e1 	mov	x1, #0x8927                	// #35111
  400890:	b9489fa0 	ldr	w0, [x29, #2204]
  400894:	97ffff77 	bl	400670 <ioctl@plt>
  400898:	7100001f 	cmp	w0, #0x0
  40089c:	54000661 	b.ne	400968 <main+0x1ec>  // b.any
  4008a0:	b948a7a0 	ldr	w0, [x29, #2212]
  4008a4:	11000400 	add	w0, w0, #0x1
  4008a8:	b908a7a0 	str	w0, [x29, #2212]
  4008ac:	912183a0 	add	x0, x29, #0x860
  4008b0:	91004800 	add	x0, x0, #0x12
  4008b4:	f90447a0 	str	x0, [x29, #2184]
  4008b8:	f94447a0 	ldr	x0, [x29, #2184]
  4008bc:	39400000 	ldrb	w0, [x0]
  4008c0:	2a0003e3 	mov	w3, w0
  4008c4:	f94447a0 	ldr	x0, [x29, #2184]
  4008c8:	91000400 	add	x0, x0, #0x1
  4008cc:	39400000 	ldrb	w0, [x0]
  4008d0:	2a0003e4 	mov	w4, w0
  4008d4:	f94447a0 	ldr	x0, [x29, #2184]
  4008d8:	91000800 	add	x0, x0, #0x2
  4008dc:	39400000 	ldrb	w0, [x0]
  4008e0:	2a0003e5 	mov	w5, w0
  4008e4:	f94447a0 	ldr	x0, [x29, #2184]
  4008e8:	91000c00 	add	x0, x0, #0x3
  4008ec:	39400000 	ldrb	w0, [x0]
  4008f0:	2a0003e6 	mov	w6, w0
  4008f4:	f94447a0 	ldr	x0, [x29, #2184]
  4008f8:	91001000 	add	x0, x0, #0x4
  4008fc:	39400000 	ldrb	w0, [x0]
  400900:	2a0003e7 	mov	w7, w0
  400904:	f94447a0 	ldr	x0, [x29, #2184]
  400908:	91001400 	add	x0, x0, #0x5
  40090c:	39400000 	ldrb	w0, [x0]
  400910:	2a0003e2 	mov	w2, w0
  400914:	90000000 	adrp	x0, 400000 <_init-0x5b0>
  400918:	9129a001 	add	x1, x0, #0xa68
  40091c:	910043a0 	add	x0, x29, #0x10
  400920:	b90003e2 	str	w2, [sp]
  400924:	aa0103e2 	mov	x2, x1
  400928:	d2800801 	mov	x1, #0x40                  	// #64
  40092c:	97ffff31 	bl	4005f0 <snprintf@plt>
  400930:	910043a2 	add	x2, x29, #0x10
  400934:	912183a1 	add	x1, x29, #0x860
  400938:	90000000 	adrp	x0, 400000 <_init-0x5b0>
  40093c:	912a2000 	add	x0, x0, #0xa88
  400940:	aa0203e3 	mov	x3, x2
  400944:	aa0103e2 	mov	x2, x1
  400948:	b948a7a1 	ldr	w1, [x29, #2212]
  40094c:	97ffff45 	bl	400660 <printf@plt>
  400950:	14000006 	b	400968 <main+0x1ec>
  400954:	90000000 	adrp	x0, 400000 <_init-0x5b0>
  400958:	912ae000 	add	x0, x0, #0xab8
  40095c:	97ffff35 	bl	400630 <puts@plt>
  400960:	12800000 	mov	w0, #0xffffffff            	// #-1
  400964:	14000009 	b	400988 <main+0x20c>
  400968:	f94457a0 	ldr	x0, [x29, #2216]
  40096c:	9100a000 	add	x0, x0, #0x28
  400970:	f90457a0 	str	x0, [x29, #2216]
  400974:	f94457a1 	ldr	x1, [x29, #2216]
  400978:	f9444ba0 	ldr	x0, [x29, #2192]
  40097c:	eb00003f 	cmp	x1, x0
  400980:	54fff641 	b.ne	400848 <main+0xcc>  // b.any
  400984:	52800000 	mov	w0, #0x0                   	// #0
  400988:	a9417bfd 	ldp	x29, x30, [sp, #16]
  40098c:	912303ff 	add	sp, sp, #0x8c0
  400990:	d65f03c0 	ret
  400994:	00000000 	.inst	0x00000000 ; undefined

0000000000400998 <__libc_csu_init>:
  400998:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  40099c:	910003fd 	mov	x29, sp
  4009a0:	a901d7f4 	stp	x20, x21, [sp, #24]
  4009a4:	90000094 	adrp	x20, 410000 <__FRAME_END__+0xf534>
  4009a8:	90000095 	adrp	x21, 410000 <__FRAME_END__+0xf534>
  4009ac:	91374294 	add	x20, x20, #0xdd0
  4009b0:	913722b5 	add	x21, x21, #0xdc8
  4009b4:	a902dff6 	stp	x22, x23, [sp, #40]
  4009b8:	cb150294 	sub	x20, x20, x21
  4009bc:	f9001ff8 	str	x24, [sp, #56]
  4009c0:	2a0003f6 	mov	w22, w0
  4009c4:	aa0103f7 	mov	x23, x1
  4009c8:	9343fe94 	asr	x20, x20, #3
  4009cc:	aa0203f8 	mov	x24, x2
  4009d0:	97fffef8 	bl	4005b0 <_init>
  4009d4:	b4000194 	cbz	x20, 400a04 <__libc_csu_init+0x6c>
  4009d8:	f9000bb3 	str	x19, [x29, #16]
  4009dc:	d2800013 	mov	x19, #0x0                   	// #0
  4009e0:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  4009e4:	aa1803e2 	mov	x2, x24
  4009e8:	aa1703e1 	mov	x1, x23
  4009ec:	2a1603e0 	mov	w0, w22
  4009f0:	91000673 	add	x19, x19, #0x1
  4009f4:	d63f0060 	blr	x3
  4009f8:	eb13029f 	cmp	x20, x19
  4009fc:	54ffff21 	b.ne	4009e0 <__libc_csu_init+0x48>  // b.any
  400a00:	f9400bb3 	ldr	x19, [x29, #16]
  400a04:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400a08:	a942dff6 	ldp	x22, x23, [sp, #40]
  400a0c:	f9401ff8 	ldr	x24, [sp, #56]
  400a10:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400a14:	d65f03c0 	ret

0000000000400a18 <__libc_csu_fini>:
  400a18:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400a1c <_fini>:
  400a1c:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400a20:	910003fd 	mov	x29, sp
  400a24:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400a28:	d65f03c0 	ret
